A high-frequency, low-noise silicon bipolar transistor that can be used in over-10 Gb/s optical communication systems and wireless communication systems has been developed. The silicon bipolar transistor was fabricated using self-aligned metal/IDP (SMI) technology, which produces a self-aligned base electrode of stacked layers of metal and in-situ doped poly-Si (IDP) by low-temperature selective tungsten CVD. It provides a low base resistance and high-cutoff frequency. The base resistance is reduced to half that of a transistor with a conventional poly-Si base electrode. By using the SMI technology and optimizing the depth of the emitter and the link base, we achieved the maximum oscillation frequency of 80 GHz, a minimum gate delay in an ECL of 11.6 ps, and the minimum noise figure of 0.34 dB at 2 GHz, which are the highest performances among those obtained from ion-implanted base Si bipolar transistors, and are comparable to those of SiGe base heterojunction bipolar transistors.

A GSM900/DCS1800 dual-band AlGaAs/GaAs HBT (heterojunction bipolar transistor) MMIC (monolithic microwave integrated circuit) power amplifier has been developed. It includes power amplifiers for GSM900 and DCS1800, constant voltage bias circuits and a d. c. switch. In order to achieve high efficiency, the outside-base/center-via-hole layout is applied to the final-stage HBT of the MMIC amplifier. The layout can realize uniform output load impedance and thermal distribution of each HBT finger. The developed MMIC amplifier could provided output power of 34.5 dBm and power-added efficiency of 53.4% for GSM900, and output power of 32.0 dBm and power-added efficiency of 41.8% for DCS1800.

Silicon-based monolithic microwave integrated circuits (MMICs) present an interesting option for low-cost consumer wireless systems. SiGe/Si heterojunction bipolar transistors (HBTs) are a major driving force behind Si-based MMICs, because they offer excellent microwave performance without aggressive lateral scaling. This article reviews opportunities for receiver frontend components (low-noise amplifiers and mixers) using SiGe HBTs.

Second harmonic signal feedback technique is applied to an HBT power amplifier for Wide-band CDMA (W-CDMA) mobile communication system to improve its linearity and efficiency. This paper describes the feedback effect of the 2nd harmonic signal from the output of the amplifier to the input on the 3rd order intermodulation distortion (IMD) products and Adjacent Channel leakage Power (ACP) of the power amplifier. The feedback amplifier, using an InGaP/GaAs HBT with 48 fingers of 3 20 µ m emitter, exhibits a 10 dB reduction in the level of the 3rd order IMD products. In addition, an ACP improvement of 7 dB for the QPSK modulation signal with a chip rate of 4.096 Mcps at 1.95 GHz was realized. As a result, the amplifier achieves a power-added efficiency of 41.5%, gain of 15.3 dB, and ACP of 43.0 dBc at a 5 MHz offset frequency and output power of 27.5 dBm. At the output power of 28 dBm, the power-added efficiency increases to 43.3% with an ACP of 40.8 dBc.

New test structures for evaluating isolation capacitance (CTS) and isolation breakdown voltage (BVCCO) have been developed. Using these test structures, we examined the scaling limit of the width and the structure of narrow isolation U-grooves for high-speed and high-density LSIs. We separated the capacitance CTS into two components, CTSS (bottom component) and CTSL (peripheral component), and analyzed the effect of the device structure (isolation width and filling materials) on CTS. We found that the minimum width of the isolation U-groove is especially limited by the increased isolation capacitance between the neighboring N+ buried layers. The minimum width is about 0.3 µm even when SiO2 is used as a filling material. So we developed an effective method to overcome this limitation. Use of a double-trench structure and/or an SOI substrate meet the requirement. A double-trench structure can reduce CTS by more than 50%, while SOI substrates gives reduced CTS, high BVCCO, high α-ray immunity, and reduced process steps.

Optical frontend and distributed amplifier IC modules, both containing GaAs heterojunction-bipolar-transistors (HBT), have been developed for 40 Gb/s optical receiver. To achieve high-speed operations, the elements in the modules including the IC and signal lines, were designed to achieve a wider bandwidth with lower electrical reflection. The influence of a bonding-wire inductance was taken into particular account in optimizing the parameters of the ICs. The optical frontend, consisting of a waveguide pin-photodiode and an HBT preamplifier IC, exhibits a transimpedance gain of 43 dBΩ and a bandwidth of 31 GHz. The distributed amplifier IC module achieves a gain of 9 dB and a bandwidth of 39 GHz. A 40-Gb/s optical receiver constructed with these modules exhibited a high receiver sensitivity of -28. 2 dBm for a 40-Gb/s optical return-to-zero signal.

This report describes AlGaAs/GaAs HBT ICs for 20-Gb/s optical transmission, the preamplifier and optical modulator driver circuits, and those ICs for 10-Gb/s clock extraction circuits, the rectifier and phase shifter circuits. These ICs were fabricated using our developed hetero guard-ring fully self-aligned HBT (HG-FST) fabrication process. The Pt-Ti-Pt-Au multimetal system was also used as a base ohmic metal to reduce base contact resistance, and a high fmax of 105 GHz was obtained. Good results in the HBT IC microwave performances were achieved from the on-wafer measurements. The preamplifiers exhibited the broad bandwidth of 20. 9 GHz. The optical modulator driver performed a sufficiently large output-voltage swing of 4-VP-P at a 20-Gb/s data rate. The rectifier and the phase shifter circuits achieved good operations at 10-Gb/s. These results suggest that these HBT ICs can be applied to 20-Gb/s optical transmission and 10-Gb/s clock extraction systems.

SiGe HBTs with doping level inversion, that is, a higher dopant concentration in the base than in the emitter, are realized based on the double-polysilicon self-aligned transistor scheme by means of selective epitaxy performed in a production CVD reactor. The effects of the Ge profile in the base on the transistor performance are explored. The fabricated HBT with a 12-27% graded Ge profile demonstrates a maximum cutoff frequency of 88 GHz, a maximum oscillation frequency of 65 GHz, and an ECL gate delay time of 13.8 ps.

This work presents a further development of the approach to modelling thermal (i.e. carrier-velocity-fluctuation) noise in semiconductor devices proposed in papers by the present authors. The basic idea of the approach is to apply classical theory of Ito's stochastic differential equations (SDEs) and stochastic diffusion processes to describe noise in devices and circuits. This innovative combination enables to form consistent mathematical basis of the noise research and involve a great variety of results and methods of the well-known mathematical theory in device/circuit design. The above combination also makes our approach completely different, on the one hand, from standard engineering formulae which are not associated with any consistent mathematical modelling and, on the other hand, from the treatments in theoretical physics which are not aimed at device/circuit models and design. (Both these directions are discussed in more detail in Sect. 1). The present work considers the bipolar transistor compact model derived in Ref. [2] according to theory of Ito's SDEs and stochastic diffusion processes (including celebrated Kolmogorov's equations). It is shown that the compact model is transformed into the Ito SDE system. An iterative method to determine noisy currents as entries of the stationary stochastic process corresponding to the above Ito system is proposed.

We present a high performance AlGaAs/GaAs power HBT with very low thermal resistance for digital cellular phones. Device structure with emitter air-bridge is utilized and device layout is optimized to reduce thermal resistance based on three-dimensional thermal flow analysis, and in spite of a rather thick substrate (100 µm), which achieved a low thermal resistance of 23/W for a multi-finger (440 µm240 fingers) HBT. This 40 finger HBT achieved power added efficiency (PAE) of over 53%, 29.1 dBm output power (Pout) and high associated gain (Ga) of 13.5 dB with 50 kHz adjacent channel leakage power (Padj) of less than -48 dBc under a 948 MHz π/4-shifted QPSK modulation with 3.4 V emitter-collector voltage. We also investigated the difference of RF performance between two bias modes (constant base voltage and current), and found which mode is adequate for each stage in several stage power amplifier for the first time.

A two-dimensional receiver OEIC array having an address selector for highly parallel interprocessor networks has been realized. The receiver OEIC array consists of two-dimensionally arranged 1616 (256) optical receiver cells with switching transistors, address selectors (decoders), and a comparator. Each optical receiver comprises a pin PD and a transimpedance-type HBT amplifier. The HBT has an InP passivation structure to suppress the emitter-size effect, which results in the improvement of current gains, especially at low collector current densities. The receiver OEIC array was fabricated on a 3-inch diameter InP substrate with pin/HBT integration technology. Due to the function of address selection, only one cell is activated and the other cells are mute, so the receiver OEIC array shows low crosstalk and low power consumption characteristics. The array also shows a 266-Mb/s data transmission capability. This receiver OEIC array is a most complex InP-based OEIC ever reported. The realization of the two-dimensional receiver OEIC array promises the future interprocessor networks with highly parallel optical interconnections.

A 7-mask self-aligned SiGe base bipolar transistor has been newly developed. This transistor offers several advancements to a super self-aligned selectively grown SiGe base (SSSB) transistor which has a selectively grown SiGe-base layer formed by a cold-wall ultra high vacuum (UHV)/CVD system. The advancements are as follows: (1) a BPSG-filled arbitrarywidth trench isolation on a SOI is formed by a high-uniformity CMP with a hydro-chuck for reducing the number of isolation fabrication steps, (2) polysilicon-plug emitter and collector electrodes are made simultaneously using an in-situ phosphorusdoped polysilicon film to decrease the distance between emitter and collector electrodes and also to reduce the fabrication steps of the elecrodes, (3) a n+-buried collector layer is made by a high-energy phosphorus ion-implantation technique to eliminate collector epitaxial growth, and (4) a germanium profile in the neutral base region is optimized to increase the fT value without increasing leakage current at the base-cellector junction. In the developed transistor, a high performance of 80-GHz fT and mask-steps reduction are simultaneously achieved.

This paper reports on a high-speed silicon bipolar transistor with an fT and fMAX of over 40 GHz, we call it the Advanced Boro-silicated-glass Self-Aligned (A-BSA) transistor. In basic BSA technology, a CVD-BSG film is used not only as a diffusion source to form the intrinsic base and the link base regions but also as a sidewall spacer between the emitter and the base polysilicon electrodes. An A-BSA transistor offers three advancements to this technology: (1) a graded collector profile underneath the intrinsic base region to suppress the Kirk effect; (2) an optimized design of the link base region to prevent the frade-off effect between fT and base resistance; and (3) a newly developed buried emitter electrode structure, consisting of an N++-polysilicon layer, a platinum silicide layer, and a CVD tungsten plug, to prevent the emitter plug effect. Furthermore, our transistor uses a BPSG filled trench isolation to reduce parasitic capacitance and improve circuit performance. In this paper, we describe device design, process technology and characterization of the A-BSA transistor, with it we have performed several application ICs, operating at 10Gb/s and above. The A-BSA transistor achieved an fT of 41 GHz and an fMAX of 44 GHz under optimized conditions.

The degradation of I-V characteristics under constant emitter-base reverse voltage stress in advanced self-aligned bipolar transistors was analyzed. Experimental analyses have been taken the stress field effect into account when predicting hot-carrier degradation. These analyses showed that base current starts to increase when the reverse voltage stress is about 3 V. The dependence of the base current change on reverse voltages of more than 3 V was also investigated experimentally, and equations expressing hot-carrier degradation in terms of the exponential dependence of excess base current on both reverse stress voltage and stress-enhancing voltage related to emitter-base breakdown voltage were derived.

A simplified distribution base resistance model (SDM) is proposed to identify each component of the base resistance and determine the dominant. This model divides the parasitic base resistance into one straight path and two surrounding paths. It is clarified that the link base resistance is dominant in a short emitter and the surrounding polysilicon base electrode resistance is dominant in a long emitter. In the SDM, the distance of the link base is reduced to half; with metal silicide as the extrinsic base electrode, the base resistance will be reduced to 75%.

This work deals with thermal-noise modeling for silicon vertical bipolar junction transistors (BJTs) and relevant integrated circuits (ICs) operating at low currents. The two-junction BJT compact model is consistently derived from the thermal-noise generalization of the Shockley semiconductor equations developed in work which treats thermal noise as the noise associated with carrier velocity fluctuations. This model describes BJT with the Itô non-linear stochastic-differential-equation (SDE) system and is suitable for large-signal large-fluctuation analysis. It is shown that thermal noise in silicon p-n-junction diode contributes to "microplasma" noise. The above model opens way for a consistent-modeling-based design/optimization of bipolar device noise performance with the help of theory of Itô's SDEs.

This paper describes small AlGaAs/GaAs HBT's for low-power and high-speed integrated circuits. The device fabrication is based on a new bridged base electrode technology that permits emitter width to be defined down to 1 µm. The new technology features oxygen-ion implantation for emitter-base junction isolation and zinc diffusion for extrinsic base formation. The oxygen-ion implanted emitter-base junction edge has been shown to provide a periphery recombination current much lower than that for the previous proton implanted edgs, the result being a much higher current gain particularly in small devices. The zinc diffusion offers high device yield and good uniformity in device characteristics even for a very thin (0.04 µm) base structure. An HBT with emitter dimensions of 12.4 µm2 yields an fT of 103 GHz and an fmax of 62 GHz, demonstrating that the new technology has a significant advantage in reducing the parasitic elements of small devices. Fabricated one-by-eight static frequency dividers and one-by-four/one-by-five two-modulus prescalers operate at frequencies over 10 GHz. The emitters of HBT's used in the divider are 12.4 µm2 in size, which is the smallest ever reported for AlGaAs/GaAs HBT IC's. These results indicate that the bridged base electrode technology is promising for developing a variety of high-speed HBT IC's.

We report the development of high-performance small-scale AlGaAs/GaAs collector-up heterojunction bipolar transistors (C-up HBT) with a carbon (C)-doped base layer. Oxygen-ion (O+) implantation is used to define their intrinsic emitter/base junctions and zinc (Zn)-diffusion is used to lower the resistivity of their O+-implanted extrinsic base layers. The highly resistive O+-implanted AlGaAs layer in the extrinsic emitter region sufficiently suppresses electron injection even under high-forward-bias conditions, allowing high collector current densities. The use of a C-doped base is especially effective for small-scale C-up HBT's because it suppresses the undesirable turn-on voltage shift caused by base dopant diffusion in the intrinsic area around the collector-mesa perimeter that occurs during the high-temperature Zn-diffusion process after implantation. Even in a small-scale trasistor with a 2 µm2 µm collector, a current gain of 15 is obtained. A microwave transistor with a 2 µm10 µm collector has a cutoff frequency fT of 68 GHz and a maximum oscillation frequency fmax of 102 GHz. A small-scale C-up HBT with a 2 µm2 µm collector shows a higher fmax of 110 GHz due to reduced base/collector capacitance CBC and its fmax remains above 100 GHz, even at a low collector current of 1 mA. The CBC of this device is estimated to be as low as 2.2 fF. Current gain dependence on collector size is also investigated for C-up HBT's and it is found that the base recombination current around the collector-mesa perimeter reduces the current gain.

A convenient method for determining emitter and base resistances from small signal measurements has been developed. This method is based on Neugroschel's method, but the frequency has been varied instead of varying β0. It is demonstrated that the base resistance was successfully extracted. The extracted emitter resistance depended on the collector current because of the difference between the exact gm value and the approximated one, IC/VT. It has also been shown that the proposed method is more robust than the conventional impedance-circle method even when cross-talk occurs.

We investigated the impact of velocity overshoot effect on collector signal delay of bipolar devices by using Monte Carlo simulation method. We found that insertion of an i-layer (lightly doped, intrinsic layer) between base and collector can increase the delay, but the strength of this effect is a function of the i-layer thickness. When the i-layer becomes thinner, the problem of increasing delay seems to disappear. This recovery of delay is realised with a mechanism which is completely different from that in drift-diffusion model.